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kbb
Joined: 01 Jun 2007 Posts: 180
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Posted: Mon Mar 01, 2010 10:05 pm Post subject: |
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| ginge wrote: | | kbb wrote: |
There is also a request that both SPI busses appear on the host connector.
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This I am not sure about. You can daisy chain many SPI devices on a bus, but each much have an ENable signal sent to it. This sort of defeats the purpose of the bus nature if you need to run a wire to each servo.
Otherwise, pins permitting, I don't see why not. |
http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus#Daisy_chain_SPI_configuration
4 pins... but does not appear to be supported in the ATxmega?
| ginge wrote: | | I2C, dual SPI, dual UART and possibly PDI. I am not against doing solder bridge jumpers or such to enable/disable certain combinations. |
Probably my previous post was not clear enough. I think, without daisy chaining, it is 8 pins plus ground, as long as you only want to use certain combinations. That is you can have one of
I2C, SPI(#1) or USART(#1)
with one of
SPI(#2) or USART(#2)
There are quite a lot of options I suspect. For example we might be able to have two off I2C on the host connector, if the “onboard I2C” is not being used. Essentially if no direct “harm” comes from multiple use of a pin, then we might as well offer it.
Anyway, I will think about this later and update my notes.
| ginge wrote: | | Even if we keep the Hirose it would be tight to accommodate 2x of any of the above protocol. |
...Which leaves 1 pin on the Hirose for power if we stick with it... unfortunately the pins are rated at 2A (which will be why Chris used 2 for power and 2 for power ground).
If the need for 2 off SPI was dropped, then it might be possible to have one of I2C, SPI(#1) or USART(#1), and USART(#2) on 6 pins, leaving 2 for power and 2for ground.
If it is possible to implement 4-pin SPI daisy chaining without bit banging it, thru the hardware, may be it is possible to leave things in a way that this is “ready to try”, even if it eventually turns out to be unsuccessful. Something to think about.
| ginge wrote: | | I am eagerly awaiting your PCB so Ican get a feel for it. |
Schematic, PCB much harder! Originally intended as a guide to myself. I will email what I have done: it is very “preliminary”; it still needs some work done on it, a thorough check and decisions about changes to things (e.g. the H-bridge needs attention).
| ginge wrote: | | kbb wrote: |
3: Is PDI (the programming and debugging port) - maybe this should be moved to a 2-pin mini-header on the PCB?
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I could live with that. If you need PDI, then you are doing "advanced stuff" and should be okay with soldering some wires. |
Exactly! People building it for themselves will need it (so not being on the connector should be okay). Given the way the ATxmega manual reads, a boot loader in the boot block should be reasonably hard for someone trash, that’s the only other time PDI might be needed.
NOTE: “ponyprog” et al, do not appear to do PDI (yet?). However, the Atmel AVRISP mkII is relatively cheap and reportedly can program them.
| ginge wrote: | | Quote: |
Currently “on board access for experimenters” is heading towards:
snip...
1 DAC?
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I can't see any use for the DAC. Anyone else? |
Many pins have multiple function, so if it is easy to do, we should. If when someone is designing the PCB they discover insufficient room we can remove the items that appear to be less “useful”!
| ginge wrote: | | This is really tricky. I would like to say that we should keep the hirose and try and work around the 6 remaining pins. Problem is I can't find a good alternative connector with higher pitch but with some current carrying grunt. |
I have had a cursory look for something small with current carrying capability, but it is all pretty large. I suppose we could dump the power connector.
| ginge wrote: | | In other news I have started the port to the XMEGAD4 if only because I can't get any Ax chip at the moment. |
Farnell say they are shipping them this week.
I see V4 as an opportunity for a code “refresh”. More another time. |
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ginge Site Admin
Joined: 14 Jan 2006 Posts: 1029 Location: Manchester, UK
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Posted: Mon Mar 01, 2010 11:18 pm Post subject: |
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| kbb wrote: | http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus#Daisy_chain_SPI_configuration
4 pins... but does not appear to be supported in the ATxmega?
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It looks we should be able to do that via the xmega using a couple of interrupts. You basically place the incoming buffer into the outgoing buffer on each cycle.
I can see a few major problems with this scheme. It requires knowing how many SPI devices you have in the bus, and you are basically using it as a shift register. You clock the required data in offset by the device ID. If you want to write the last device in the chain, say 8, you require (packets) * 8 cycles to get that data in.
It seems lack a really ugly hack. I'm still out
| kbb wrote: |
3: Is PDI (the programming and debugging port) - maybe this should be moved to a 2-pin mini-header on the PCB?
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I have done a complete u-turn on this one... I think it would be important o make sure that PDI is on the header. I forgot that SPI programming is no longer supported!
| kbb wrote: | | I suppose we could dump the power connector. |
Can you clarify what you mean here?
| kbb wrote: |
I see V4 as an opportunity for a code “refresh”. More another time. |
Indeed. Even the preliminary work I have been doing with the simulator has shown me that this chip, although similar to the mega, is an entirely more interesting prospect. I will start a v4-software thread to start discussing and getting things together. I have a few ideas about overhauling some of the inner workings. _________________ http://www.headfuzz.co.uk/
http://www.robotfuzz.co.uk/ |
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kbb
Joined: 01 Jun 2007 Posts: 180
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Posted: Wed Mar 03, 2010 10:46 pm Post subject: |
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| ginge wrote: | | kbb wrote: | | I suppose we could dump the power connector. |
Can you clarify what you mean here?
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Captured leads soldered directly to the board. I guess there are pros and cons as to whether or not connectors or captured leads are used (for power and/or data). For example: occasionally a connector will pull out on my biped, despite the plan in place to prevent that (not glue).
Also of note today: the way the ground pins on the existing connector are set is nice because it makes it easier to form “twisted pairs” for the I2C/TWI bus.
Last edited by kbb on Thu Mar 04, 2010 12:53 am; edited 1 time in total |
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ginge Site Admin
Joined: 14 Jan 2006 Posts: 1029 Location: Manchester, UK
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Posted: Wed Mar 03, 2010 11:03 pm Post subject: |
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I am on the fence with connectors. I would probably put my own on there if we decided that it was going to connectorless.
My STK600 arrived today. It looks like I went crazy with the quantity of the STK600-RC044X-15 adapter board and ordered 4 of them. If anyone wants one let me know.
I also took delivery of the D4 chips, and after speaking to Farnell, it looks like we should get the A4 chips next week. It also seems like the TQFP adapter socket shim is not arriving until next week. For now I am playing the supplied mega2560 until the socket arrives. _________________ http://www.headfuzz.co.uk/
http://www.robotfuzz.co.uk/ |
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kbb
Joined: 01 Jun 2007 Posts: 180
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Posted: Thu Mar 04, 2010 10:54 pm Post subject: |
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About duplicating bus types on the host connector
It is difficult to know whether to put this in “Hardware”, or “Software”, but in regards to the wish for more than one of each port on the host connector. I am wondering what the main aim is? Especially in regards of SPI. For host comms, surely one is enough? A second serial port as somekind of OpenServo "debug port" maybe.
Host comms
I2C/TWI is an already well defined protocol.
So by way of an example, here is a very simplified view of using a single serial port for communications between OpenServo devices and the host.
Serial, one port - example 1: ring based
Here is a _very simple_ example for the purpose of outlining how it might be implemented.
The host and devices are cabled up so that the host transmits to a device; this device transmits to another and so on, until finally the last device in the ring transmits back to the host. A packet based protocol might be used. For example:
START, device-address, command, [data0, ...dataN], CHECKSUM, END
If a device has seen START but the address is not it’s own, then it sends START and the address to the device to which it is connected (which is the host if it is the last one in the link, it does not know), and then relays all the following bytes it sees, immediately, until END is encountered.
If the address is it’s address, then it sends nothing to the next device until after the END is seen. It responds in what ever way is appropriate to what it has received. This may include sending something to the host (by transmitting it to whatever it is attached, which, if it is a device will merely forward it on).
Once END has been seen, the process starts again from the next time a START is seen.
So, for example, let the host be address 0, there are 3 devices (1, 2 and 3). The order in which the devices are wired up does not matter, but for the purpose of exampling this example we will assume it is address order. So, the host sends a command to read the position from device 2:
Device1 sees: "START, 2, READPOS, CRC, END". So this will be sent to the cabled up next device.
Device2 sees: "START, 2, READPOS, CRC, END". So this will never be sent to the next device.
After the END, device2 responds by sending "START, 0, MYPOSITIONIS, data0, data1, CRC, END" to device 3.
Device3 sees that the packet is not for it, so it transmits everything as-is to the next device (which unbeknown to it is the host).
The host has got its answer and an acknowledgement that what it sent was received.
There is a small latency here, but nothing to worry about. The main disadvantage is that if a device “dies” the host cannot talk to any of them: on the other hand, a breakage probably ruins the game anyway, and the same thing can happen with I2C and many other protocols.
Serial, one port - example 2: "multi-drop"
I’ll skimp on some of the details again.
The TX from the host is connected to RX on all devices, TX of all devices is connected to RX on the host. All devices listen all the time, but "only one speaks at any one time". All devices keep their TX pins at high impedance whilst they’re not talking. Other than that this is just a different off-board wiring strategy.
A very simple example again: Using the same packet structure as the other example to keep things sane, but this time the devices do not relay what they see and the host does not send the END until it has received an acknowledgement (or times out). So for example (using the same example as above).
All devices see: "START, 2, READPOS, CRC"
All devices but device 2 “ignore” the request. When device 2 sees the CRC, it enables its TX pin and transmits "START, 0, MYPOSITIONIS, data0, data1, CRC, END" and then disables its TX pin again.
The host accepts the MYPOSITIONIS is as an acknowledgement and sends the END. All devices now wait for the next START.
The main disadvantage is providing (if needed) some form of protection in case two devices enable their TX pins at the same time (i.e. one ground, one high) - it possibly depends on what the ATxmega series of processors have in the way of protection (if anything). As with any other bus, if one of the devices dies it may block the bus.
Finally
It is worth mentioning that all devices have to monitor the traffic to know what is what.
Assuming asynchronous serial, both examples can be achieved using just two pins and ground. An additional pin could be added for some more control (for example: a “bus reset”).
Advantages of using a serial link over I2C: it might be faster (depends on...), it is more accessible (it is much easier to hook up and program for a serial link, especially if you have never used I2C/SPI).
Clearly I left out some of the finder details: including things that make it better and a little more advanced. The “multi-drop” method might benefit from an extra control pin.
SPI may be faster, but over a long length of cable? Using the SPI bus is also somewhat more complicated.
Last edited by kbb on Sat Mar 06, 2010 11:38 pm; edited 1 time in total |
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kbb
Joined: 01 Jun 2007 Posts: 180
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Posted: Sat Mar 06, 2010 11:34 pm Post subject: |
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| ginge wrote: | | I am on the fence with connectors. I would probably put my own on there if we decided that it was going to connectorless. |
I think the option for both methods would be present, as is currently the case with v3.
Have spent some time looking at the potential changes for the “host connector/connection for data and power”, here is a summary:
Overview of expected requirements
Data pins plus ground: Twisted pairs are easier with companion ground pins/connections. The number of data pins for v4 is currently unclear (it depends on other things to be discussed elsewhere), but it is at least 5 (the smallest number of pins you can “get away with” if you want: 1 of each of I2C/TWI, USART and SPI available for comms, and also a separate optional power supply for electronics: no PDI).
Power: minimum 4 amps, recommended 6 amps. Probable absolute maximum that could be (sensibly) supported by the board is 10 amps (this latter would definitely be when using the “busbar” solution).
Space: any connector(s) or connection solution needs to be able to be attached to the OpenServo board and still retain the ability for it to be mounted in a standard servo. All in a sensible way.
Positioning: The external aspect of the existing Hirose header type connector is in the position expected for a normal servo’s connection; and it does not stand too proud from the case (which is also good). However, it is non-locking (although, with care, it could be glued in, maybe even “temporarily” with hot glue). This location needs to be retained for connections. “Stacking” a power connection behind may be acceptable, depending on size.
Note: the existing Hirose header type connector on v3 has 10 pins; this usage includes using 4 of the pins to supply power to the OpenServo, giving a maximum design current of 4 amps for v3 (for those with the appropriate MOSFETs installed).
Note: Use of a data connector can makes for a neat, tidy and clean attachment (as opposed to “soldering lots of wires to the board”).
Single connector
Trying to squeeze more pins and greater power into the same space as currently occupied by the Hirose connector does not seem possible in a reasonable way. Connectors with more connections do not look mechanically sound for the purpose to which they would be put, nor do they make it easier to support the amps needed. I think it would be mad to try with what I have seen!
For the existing connector, if the use of companion grounds for the data pins were dropped completely (not a fan of that), then we could get the 5 pins mentioned above, but only 4 amps max power. Similar sized connectors to the Hirose header all seem to be rated at up to 2 amps per pin (where capacity is stated, but it is probably a common theme), the only real advantage for changing data connector type might be to obtain a “locking” plug/socket - although that probably would use slightly more space on the outside of the servo case.
Separate power and data connectors
In this scenario, the Hirose or similar header type connector remains in the existing location, but is only used for data. A second “beefier” connector is used for power. The physical size tends to increase quite rapidly with current. A typical mounting position would be to be on the side of the case adjacent to the data connector.
However, I have yet to find anything specifically designed for power (a 2-way power connector) that allows significantly more amps than what we can achieve with the header type of connector, and is also sufficiently small. Clashes with the pot (or encoder) currently seem inevitable, unless it is allowed to protrude well out from the case (undesirable in my opinion). Additionally, from a bulk manufacturing cost point of view, how the second connector is fitted might be a consideration (possibly an end user task).
One solution to this would be to use another header style connector purely for power, for example a 2 by 4 connector would allow an 8 amp supply. A 2 by 4 Hirose might just fit neatly behind the 2 by 5 data Hirose without the need to further weaken the screw channels that hold the servo together, and internal space usage would also be kept to a minimum. One would probably choose different connector of this type, or swap the orientation of the socket/plugs, to prevent the power being plugged into the data connector (this may be blocked, for example, by the lugs on the Hirose connector, but the thing is weak, so the power connector, if it were the same, could be easily forced in). The problem to note about this solution is that to use single power cables, they would need to be soldered to the connector in a way that might be a bit ugly.
Finally
My current gut feeling if I were doing this on my own would be to think about retaining a similar/the same style header connector for data (it makes it neat), connected to board in the same way as now. For power I would be tempted to experiment with the header connector approach mention at the end of the previous section, and if that was too ugly, I would go for the captured lead (soldered to the board) method with the intention that the power leads exit the servo case behind/adjacent to the data connector.
All this still leaves open the options for end-users to
use captured leads for the data connection if they wish (both methods)
install a power connector of their choice and solder the backside of that to the board (using appropriate wire) - because that is probably going to be how it needs to be attached. |
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jharvey co-admin
Joined: 15 Mar 2009 Posts: 350 Location: Maine USA
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Posted: Sun Mar 07, 2010 10:29 am Post subject: |
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Would it be possible to include a "1wire" bus or similar technology? Such that you simply give it power lines and the data bus is on that connection. There are some interested projects about it here.
http://owfs.org/
I see the wikipedai notes a parallel port running at 100kbits/s can make the signals for this bus. Perhaps that's an approximate through put of this bus. Not exactly sure how fast (or slow) it is. I also see a note of 100m bus length, so I suspect our short runs are just fine with this bus. |
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ginge Site Admin
Joined: 14 Jan 2006 Posts: 1029 Location: Manchester, UK
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Posted: Sun Mar 07, 2010 12:51 pm Post subject: |
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Ok,
let's boil this down then...
* Hirose connector: It stays
* Power: Leave power on the Hirose. Add additional solder pads for connecting power to the "bus bars"
* Twisted Pair with matching grounds: If we can, yes.
* SPI: Why do we need SPI at all? I am still not sure where this request came in, and if it is relevant. Personally I don't want to see it on the host connector if it means we lose something else (PDI)
* PDI: I think this is important, if only for sanity during development.
* Exposed Busses: Serial, two is nice but a ring or multidrop is fine by me. How does the dynamixel stuff implement serial? I2C is a must (or course).
Personally I am only interested in making OpenServo serial and i2c compatible. So, I think the host connector should have:
PDI
SERIAL
I2C
1x GPIO
obviously some pin overlap is going to occur here, but at first glance it looks feasible. It isn't like we are going to use more than one protocol at a time. Kbb?
Something else occurred to me. People were asking for a 3.3v input pin on the host connector. Did we decide that because of the larger diffference between servo and mcu voltage that it no longer matters? When we converted v3 to 3.3v it made a positive difference to the stability but added more noise. We can combat noise in our xmega filtering circuits.
As for One Wire... there is no hardware support, but it doesnt stop you writing a bit bang interface to talk to the host. OWi is a pretty simple protocol, and quick to implement. Personally it doesn't really fit into anything I need to do with the OpenServo, but I would certainly add it to the CVS if someone wrote it. There is no reason why you couldn't also write it for the v3, v2 or v1 OpenServo.
EDIT:
forgot to mention my STK600 arrived yesterday and I have some basic TWI and PWM code running. Now to discuss ADC in the software thread! _________________ http://www.headfuzz.co.uk/
http://www.robotfuzz.co.uk/ |
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kbb
Joined: 01 Jun 2007 Posts: 180
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Posted: Sun Mar 07, 2010 10:56 pm Post subject: |
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| ginge wrote: | * Hirose connector: It stays
* Power: Leave power on the Hirose. Add additional solder pads for connecting power to the "bus bars"
* Twisted Pair with matching grounds: If we can, yes.
* SPI: Why do we need SPI at all? I am still not sure where this request came in, and if it is relevant. Personally I don't want to see it on the host connector if it means we lose something else (PDI)
* PDI: I think this is important, if only for sanity during development.
* Exposed Busses: Serial, two is nice but a ring or multidrop is fine by me. How does the dynamixel stuff implement serial? I2C is a must (or course).
Personally I am only interested in making OpenServo serial and i2c compatible. So, I think the host connector should have:
PDI
SERIAL
I2C
1x GPIO
obviously some pin overlap is going to occur here, but at first glance it looks feasible. It isn't like we are going to use more than one protocol at a time. |
Dynamixel: As far as I know is it is single wire bus.
The existing connector has 10 pins, to support a design for up to 4 amps and leaving power on this connector means that only 6 pins can be used for other functions.
We would therefore definitely have to overlap some pin functions; pins on the ATxmega32A4 are multi function which helps. So if we want:
2 off SERIAL (asynchronous)
I2C
1x GPIO (I assume ADC to be included)
Why two serial ports? Is there a specific intent for the gpio pin?
PDI: PDI clock definitely cannot be shared. And at first glance it does not look like PDI data should be shared either. So PID takes away two pins if it is included. If it is purely for “in-servo firmware debugging”, then I am tempted to think of suggesting it is on a two pin header on the board and a cable is passed out thru a hole in the servo case? I would assume most people are not going to use it.
If one wants 2 off asynchronous serial ports and 1 gpio at the same time, then that makes 5 pins: which would appear to zero out the PDI option. If only one serial port at the same time as a gpio pin, then we are down to 4 pins. TWI would be shared onto two of the pins. Any pins not being used for comms, can probably be used for gpio: thus I2C/TWI or one serial port and 4 pins means two gpio pins.
Clearly the firmware must not enable two pins that are connected together as outputs at the same time. As long as the firmware obeys the rules about which pins should not be switched to outputs at the same time, we could share several other functions. I imagine some resistors will be needed for (limited) protection (to prevent over current conditions in the event of an “accident”). If we examine port C on the ATxmega32A4 we see that USARTC1 is shared with an SPI port (in fact both SPI ports are shared with USARTs). Therefore we can probably throw in a SPI port for “free” should anyone actually ever want it.
So an off the cuff suggestion would be to use port C to get two asynchronous, the I2C/TWI and a digital gpio port. Port B might be used to provide an ADC channel for the gpio pin. Note that, depending on PCB design, one might want to change pin usages to cut down on routing.
I will work something up on the schematic.
| ginge wrote: | | Something else occurred to me. People were asking for a 3.3v input pin on the host connector. Did we decide that because of the larger diffference between servo and mcu voltage that it no longer matters? When we converted v3 to 3.3v it made a positive difference to the stability but added more noise. We can combat noise in our xmega filtering circuits. |
I think the intent was an alternative supply on the host connector, which could be routed to the regulator as an alternative to the battery supplying the servo. Clearly another pin on the connector. However, if we address the following maybe this be removed from the table:
I imagine that brownout/reset issues may stem from battery sag, inductive loads/loads chomping down on the supply, noise. The current implementation has no protection for the supply to the MCU, I imagine that the drop to 3.3 will still involve a potential issue unless something is down about that. On the schematic I have, I am working up a plan to tackle this (it is even started on the one I sent out). Potentially a two fold strategy may evolve: a diode and a capacitor on the battery side to buffer it against supply issues. And a cap on the logic side to help smooth things out. Unless someone has a better idea?
Clearly a good candidate for prototyping and testing.
Last edited by kbb on Sun Mar 07, 2010 11:27 pm; edited 1 time in total |
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kbb
Joined: 01 Jun 2007 Posts: 180
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Posted: Sun Mar 07, 2010 11:25 pm Post subject: |
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| jharvey wrote: | Would it be possible to include a "1wire" bus or similar technology? Such that you simply give it power lines and the data bus is on that connection. There are some interested projects about it here.
http://owfs.org/
I see the wikipedai notes a parallel port running at 100kbits/s can make the signals for this bus. Perhaps that's an approximate through put of this bus. Not exactly sure how fast (or slow) it is. I also see a note of 100m bus length, so I suspect our short runs are just fine with this bus. |
Many people wanting different things locks out the use of 1-wire comms as the single comms solution to make more pins available for power. The "speed" would depend on design, implementation, hardware used and so on. The web page you posted currently says it is "relatively slow", whatever that means!
Each pin on the current Hirose connector has 10 pins and each pin is rated at a maximum of 2 amps (this assumes you use the correct cable and crimp them properly). You need them in pairs for each 2 amps (a supply and a ground), thus the possible OpenServo vs comms configurations are:
Designed for a max of 2 amps: 8 pins for comms
Designed for a max of 4 amps: 6 pins for comms
Designed for a max of 6 amps: 4 pins for comms
Designed for a max of 8 amps: 2 pins for comms
Of course it might be nice to have one of the comms pins as the comms ground.
The datasheet for the current Hirose connector can be found here:
http://www.hirose.co.jp/cataloge_hp/e54305002.pdf
I think the solution looks like it is probably going to be 4 amps via the connector. Anything above that requiring the end-user to make their own arrangements: for example, soldering on captured supply leads. |
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jharvey co-admin
Joined: 15 Mar 2009 Posts: 350 Location: Maine USA
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Posted: Mon Mar 08, 2010 12:30 am Post subject: |
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| kbb wrote: | | Dynamixel: As far as I know is it is single wire bus. |
That's interesting. I see they used the third wire as data, so it's quite different from 1wire which combines power and data. Dynamixel uses a common ground with 1 wire to transmit data. At that point, can't gnd also be CANL then use the third wire as CANH, and use an industrial standard? |
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ginge Site Admin
Joined: 14 Jan 2006 Posts: 1029 Location: Manchester, UK
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Posted: Mon Mar 08, 2010 1:49 am Post subject: |
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| kbb wrote: |
The existing connector has 10 pins, to support a design for up to 4 amps and leaving power on this connector means that only 6 pins can be used for other functions.
We would therefore definitely have to overlap some pin functions; pins on the ATxmega32A4 are multi function which helps. So if we want:
2 off SERIAL (asynchronous)
I2C
1x GPIO (I assume ADC to be included)
Why two serial ports? Is there a specific intent for the gpio pin?
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It was a "would be nice". We only need 1 serial port. Current I connect all of the v3's GPIO INTn pins and use them to trigger the host in case of emergencies. For example one of my openservos has a limit switch that pulls the gpio to tell the host. I like the idea that it could also be ADC.
| kbb wrote: |
PDI: PDI clock definitely cannot be shared. And at first glance it does not look like PDI data should be shared either. So PID takes away two pins if it is included. If it is purely for “in-servo firmware debugging”, then I am tempted to think of suggesting it is on a two pin header on the board and a cable is passed out thru a hole in the servo case? I would assume most people are not going to use it.
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As PDI is the only programming method, the PDI pins need to be as accessible as possible in order to allow people to bootstrap. Not everyone can pre-flash the bootloader using something like the STK600 tools. It seems like a sensible precaution.
| kbb wrote: | I imagine that brownout/reset issues may stem from battery sag, inductive loads/loads chomping down on the supply, noise. ...snip... Potentially a two fold strategy may evolve: a diode and a capacitor on the battery side to buffer it against supply issues. And a cap on the logic side to help smooth things out. Unless someone has a better idea?
Clearly a good candidate for prototyping and testing. |
I don't think it is going to be long before I am there with the firmware. I have the hardware modules working, and the scope is showing it looks good from a hardware point of view.
Once I break this out onto breadboard, we can start looking at options. I have some pretty shitty power supplies that I know brown out one of hitec conversions. _________________ http://www.headfuzz.co.uk/
http://www.robotfuzz.co.uk/ |
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kbb
Joined: 01 Jun 2007 Posts: 180
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Posted: Mon Mar 08, 2010 7:47 am Post subject: |
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| ginge wrote: | | kbb wrote: | PDI: PDI clock definitely cannot be shared. And at first glance it does not look like PDI data should be shared either. So PID takes away two pins if it is included. If it is purely for “in-servo firmware debugging”, then I am tempted to think of suggesting it is on a two pin header on the board and a cable is passed out thru a hole in the servo case? I would assume most people are not going to use it.
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As PDI is the only programming method, the PDI pins need to be as accessible as possible in order to allow people to bootstrap. Not everyone can pre-flash the bootloader using something like the STK600 tools. It seems like a sensible precaution. |
I understand the PDI is need to a first time boot loader flash . I think maybe that’s the only option for the ATxmega. My point was that I would have thought someone who needs to do that would be happy with a two pin header on the board rather than using up two pins on the host connector. The same with hardware level debugging, it is probably the exception rather than the rule. So we have non-shareable two pins that would hardly, if ever, be used again after the first installation of the boot loader.
So the question is would people be happy with the “minor inconvenience” of them (PDI pins) being on the inside to gain two pins on the outside? |
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ginge Site Admin
Joined: 14 Jan 2006 Posts: 1029 Location: Manchester, UK
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Posted: Mon Mar 08, 2010 9:01 am Post subject: |
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Yeah I see your point of view here, but how are we going to flash them?
Assume I just got 2000 in box box, pre assembled but no bootstrap. I don't want to have to solder anything on to the board in order to first time bootstrap them. _________________ http://www.headfuzz.co.uk/
http://www.robotfuzz.co.uk/ |
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kbb
Joined: 01 Jun 2007 Posts: 180
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Posted: Mon Mar 08, 2010 9:35 pm Post subject: |
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| ginge wrote: | Yeah I see your point of view here, but how are we going to flash them?
Assume I just got 2000 in box box, pre assembled but no bootstrap. I don't want to have to solder anything on to the board in order to first time bootstrap them. |
Using the mini 2-pin header I suggested having on the board itself, rather than using up two pins on the Hiros connector?
I wonder of they can be pre-programmed by the supplier (still keeping PDI, just to save on effort), if so is it cost effective? |
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